>From the datasheet, the actual duty cycle is:
(period - (1/clk) * CDTY)/period

This actually correct the polarity of the PWM and solves the issue that pwm-leds
exhibits: when setting a duty cycle of 0 and then disabling a channel, the level
was wrong (1 when the polarity was normal and 0 when the polarity was inversed).

Signed-off-by: Alexandre Belloni <alexandre.bell...@free-electrons.com>
---
 drivers/pwm/pwm-atmel.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
index 2d69e9c431dd..0adc952cc4ef 100644
--- a/drivers/pwm/pwm-atmel.c
+++ b/drivers/pwm/pwm-atmel.c
@@ -133,7 +133,7 @@ static int atmel_pwm_config(struct pwm_chip *chip, struct 
pwm_device *pwm,
        prd = div;
        div *= duty_ns;
        do_div(div, period_ns);
-       dty = div;
+       dty = prd - div;
 
        ret = clk_enable(atmel_pwm->clk);
        if (ret) {
-- 
1.8.3.2

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