[PATCH v2 4/5] ARM: berlin/dt: add cpupll and syspll support to BG2CD

[Alexandre Belloni]

The Berlin BG2CD has two supported PLLs: CPU PLL and System PLL, add those to
the SoC device tree.

This also moves the remaining clocks from the clocks container node to the root.

Signed-off-by: Alexandre Belloni <alexandre.bell...@free-electrons.com>
---
 arch/arm/boot/dts/berlin2cd.dtsi | 48 ++++++++++++++++++++++++++--------------
 1 file changed, 31 insertions(+), 17 deletions(-)

diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index 094968c27533..bd4e9dd4867e 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -30,24 +30,24 @@
                };
        };
 
-       clocks {
-               smclk: sysmgr-clock {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0>;
-                       clock-frequency = <25000000>;
-               };
+       smclk: sysmgr-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <25000000>;
+       };
 
-               cfgclk: cfg-clock {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0>;
-                       clock-frequency = <75000000>;
-               };
+       cfgclk: cfg-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <75000000>;
+       };
 
-               sysclk: system-clock {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0>;
-                       clock-frequency = <300000000>;
-               };
+       twdclk: twdclk {
+               compatible = "fixed-factor-clock";
+               #clock-cells = <0>;
+               clocks = <&cpupll>;
+               clock-mult = <1>;
+               clock-div = <3>;
        };
 
        soc {
@@ -76,7 +76,21 @@
                        compatible = "arm,cortex-a9-twd-timer";
                        reg = <0xad0600 0x20>;
                        interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&sysclk>;
+                       clocks = <&twdclk>;
+               };
+
+               syspll: syspll@ea0014 {
+                       compatible = "marvell,berlin2-pll";
+                       clocks = <&smclk>;
+                       #clock-cells = <0>;
+                       reg = <0xf7ea0014 8>;
+               };
+
+               cpupll: cpupll@ea003c {
+                       compatible = "marvell,berlin2-pll";
+                       clocks = <&smclk>;
+                       #clock-cells = <0>;
+                       reg = <0xf7ea003c 8>;
                };
 
                apb@e80000 {
-- 
1.8.3.2

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