A comment states, that, according to the data sheet, to enable
interrupts the disable register should be written, but the enable
register could be left untouched. And it suspsects a HW bug requiring
to write both.
Reviewing the data sheet, these statements seem wrong. Just as one would
expect. Writing to the enable/disable register enables/disables
interrupts.
Hence the misleading comment and needless write to the disable register
are removed from the enable sequence.
Signed-off-by: Soren Brinkmann <soren.brinkm...@xilinx.com>
Tested-by: Michal Simek <michal.si...@xilinx.com>
---
I added a few lines to comment the change and altered the summary line.
In case this causes issues it should show up a little easier as a
candidate to revert.
Changes in v3: None
Changes in v2: None
---
drivers/tty/serial/xilinx_uartps.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/tty/serial/xilinx_uartps.c
b/drivers/tty/serial/xilinx_uartps.c
index b182ab8cfd07..f9a2c2fc03c4 100644
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -1085,11 +1085,7 @@ static void xuartps_console_write(struct console *co,
const char *s,
xuartps_writel(ctrl, XUARTPS_CR_OFFSET);
- /* restore interrupt state, it seems like there may be a h/w bug
- * in that the interrupt enable register should not need to be
- * written based on the data sheet
- */
- xuartps_writel(~imr, XUARTPS_IDR_OFFSET);
+ /* restore interrupt state */
xuartps_writel(imr, XUARTPS_IER_OFFSET);
if (locked)
--
1.9.1.1.gbb9f595
--
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