2014-04-28 18:08 GMT+08:00 Thomas Gleixner <t...@linutronix.de>: > On Mon, 28 Apr 2014, Axel Lin wrote: > >> According to the datasheet, the attribute of Interrupt Status Register is >> RW0S, >> which means: >> Software can read the register. >> Software can also "write 1 to clear". "write 0" has no effect. >> >> So the read/modify/write cycle is no necessary, switch to a simple write >> clear >> instead. > > Again, what's the point of this? > > There is still nothing which masks the interrupt at the controller > level which is the purpose of the irq_mask() callback. > Ah, stupid me. Let me try again to fix this.
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