On 07/31/2014 03:16 PM, Ingo Molnar wrote:
>
> * Yan, Zheng <zheng.z....@intel.com> wrote:
>
>> This patch series implements large PEBS interrupt threshold. For some
>> limited cases, it can significantly reduce the sample overhead. Please
>> read patch 6's commit message for more information.
>>
>> changes since v1:
>> - drop patch 'perf, core: Add all PMUs to pmu_idr'
>> - add comments for case that multiple counters overflow simultaneously
>> changes since v2:
>> - rename perf_sched_cb_{enable,disable} to perf_sched_cb_user_{inc,dec}
>> - use flag to indicate auto reload mechanism
>> - move codes that setup PEBS sample data to separate function
>> - output the PEBS records in batch
>> - enable this for All (PEBS capable) hardware
>> - more description for the multiplex
>> changes since v3:
>> - ignore conflicting PEBS record
>
> Please include performance measurements, 'significantly reduces sample
> overhead' is a totally inadequate description to judge this patch set.
patch 6 contains performance data.
>
> Please also include total diffstat in the 0/N mail.
>
will do.
Regards
Yan, Zheng
> Thanks,
>
> Ingo
>
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