From 58512475cba93003c23f2b380b573e64eebcabd5 Mon Sep 17 00:00:00 2001
From: Sadasivan Shaiju <sshaiju@mvista.com>
Date: Mon, 20 Feb 2012 13:25:50 -0800
Subject: [PATCH] Interrupt : delaying enabling of interrupt

Source: MontaVista Software, LLC
MR: 47157
Type: Defect Fix
Disposition: Local
ChangeID: 48c837329556b161f3111e6fded1c9857fa3a149
Description:

This patch is to delay the enabling of interrupt till
smp_finish . So that kthread_bind can safely bind
threads to any possible cpu. Without this change
interrupt should occur beofre  the  processor was
completely up, and  the softirq threads were unable
to schedule on the processor and  then  ran on the
wrong CPU.

Signed-off-by: Sadasivan Shaiju <sshaiju@mvista.com>
---
 arch/mips/cavium-octeon/smp.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index ff21542..c7de7ac 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -308,7 +308,6 @@ static void octeon_init_secondary(void)
 	octeon_init_cvmcount();
 
 	octeon_irq_setup_secondary();
-	raw_local_irq_enable();
 }
 
 /**
@@ -365,6 +364,8 @@ static void octeon_smp_finish(void)
 
 	/* to generate the first CPU timer interrupt */
 	write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
+	/* enable local interrupts */
+	raw_local_irq_enable();
 }
 
 /**
-- 
1.7.0.1

