On 09/03/2014 02:50 PM, Jonghwa Lee wrote:
> When it writes some value other than 0 to BTLDset and JIGset, muic device
> will be reset automatically. And it happens during updating ADC debounce time,
> because it shares same register. To update ADC debounce time without reset,
> set value only to ADCDbset and 0 to BTLDset and JIGset.
>
> Signed-off-by: Jonghwa Lee <jonghwa3....@samsung.com>
> ---
> drivers/extcon/extcon-max77693.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/extcon/extcon-max77693.c
> b/drivers/extcon/extcon-max77693.c
> index 77460f2..661a3bb 100644
> --- a/drivers/extcon/extcon-max77693.c
> +++ b/drivers/extcon/extcon-max77693.c
> @@ -255,10 +255,15 @@ static int max77693_muic_set_debounce_time(struct
> max77693_muic_info *info,
> case ADC_DEBOUNCE_TIME_10MS:
> case ADC_DEBOUNCE_TIME_25MS:
> case ADC_DEBOUNCE_TIME_38_62MS:
> - ret = regmap_update_bits(info->max77693->regmap_muic,
> + /*
> + * Don't touch BTLDset, JIGset when you want to change adc
> + * debounce time. BTLDset, JIGset reflects actual pin status
> + * and are not configurable.
> + */
> + ret = regmap_write_bits(info->max77693->regmap_muic,
> MAX77693_MUIC_REG_CTRL3,
> - CONTROL3_ADCDBSET_MASK,
> - time << CONTROL3_ADCDBSET_SHIFT);
> + (CONTROL3_ADCDBSET_MASK &
> + time << CONTROL3_ADCDBSET_SHIFT));
Do you make this patch on extcon-next branch?
The max77693_muic_set_debounce_time() of extcon-max77693.c
use regmap_update_bits instead of regmap_write_bits as following:
switch (time) {
case ADC_DEBOUNCE_TIME_5MS:
case ADC_DEBOUNCE_TIME_10MS:
case ADC_DEBOUNCE_TIME_25MS:
case ADC_DEBOUNCE_TIME_38_62MS:
ret = regmap_update_bits(info->max77693->regmap_muic,
MAX77693_MUIC_REG_CTRL3,
CONTROL3_ADCDBSET_MASK,
time << CONTROL3_ADCDBSET_SHIFT);
if (ret) {
dev_err(info->dev, "failed to set ADC debounce time\n");
return ret;
}
Thanks,
Chanwoo Choi
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