On Wed, Sep 10, 2014 at 12:40 PM, Toshi Kani <[email protected]> wrote: > On Wed, 2014-09-10 at 11:29 -0700, Andy Lutomirski wrote: >> On Wed, Sep 10, 2014 at 9:51 AM, Toshi Kani <[email protected]> wrote: > : >> > +#ifndef ARCH_HAS_IOREMAP_WT >> > +#define ioremap_wt ioremap_nocache >> > +#endif >> > + >> >> This is a little bit sad. I wouldn't be too surprised if there are >> eventually users who prefer WC or WB over UC if WT isn't available >> (and they'll want a corresponding way to figure out what kind of fence >> to use). > > Right, this redirection is not ideal for the performance, but it is done > this way for the correctness. WT & UC have strongly ordered writes, but > WB & WC do not.
Fair enough. I think that this is unlikely to ever matter on x86, but it might if NV-DIMMs end up used on another architecture w/o WT (or on Xen, perhaps). Your code is certainly fine from a correctness POV. Aside: WB writes are IIRC even more strongly ordered than WC. > > Thanks, > -Toshi > -- Andy Lutomirski AMA Capital Management, LLC -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
