The FUSE and RAM controllers don't have any connected IRQs, reducing the number
of IRQs to 48.
Signed-off-by: Alexandre Belloni <alexandre.bell...@free-electrons.com>
---
drivers/irqchip/irq-atmel-aic5.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c
index 04fe2c1b5178..dc7d98607a89 100644
--- a/drivers/irqchip/irq-atmel-aic5.c
+++ b/drivers/irqchip/irq-atmel-aic5.c
@@ -341,7 +341,7 @@ static int __init aic5_of_init(struct device_node *node,
return 0;
}
-#define NR_SAMA5D3_IRQS 50
+#define NR_SAMA5D3_IRQS 48
static int __init sama5d3_aic5_of_init(struct device_node *node,
struct device_node *parent)
--
1.9.1
--
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