Do you think a WARN necessary before clearing the bit?
Regards,
Loic
On 17/09/2014 15:18, Mathias Nyman wrote:
On 09/17/2014 03:30 PM, Loic Poulain wrote:
Direct Irq En bit can be initialized to a bad value.
This bit has to be cleared for io access mode.
Signed-off-by: Loic Poulain <[email protected]>
---
drivers/pinctrl/pinctrl-baytrail.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-baytrail.c
b/drivers/pinctrl/pinctrl-baytrail.c
index 975572e..94902f7 100644
--- a/drivers/pinctrl/pinctrl-baytrail.c
+++ b/drivers/pinctrl/pinctrl-baytrail.c
@@ -44,6 +44,7 @@
/* BYT_CONF0_REG register bits */
#define BYT_IODEN BIT(31)
+#define BYT_DIRECT_IRQ BIT(27)
#define BYT_TRIG_NEG BIT(26)
#define BYT_TRIG_POS BIT(25)
#define BYT_TRIG_LVL BIT(24)
@@ -232,7 +233,7 @@ static int byt_irq_type(struct irq_data *d, unsigned type)
/* For level trigges the BYT_TRIG_POS and BYT_TRIG_NEG bits
* are used to indicate high and low level triggering
*/
- value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL);
+ value &= ~(BYT_DIRECT_IRQ | BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL);
switch (type) {
case IRQ_TYPE_LEVEL_HIGH:
Just checked that there is a patch already upstream that warns if this bit is
set.
It defines BYT_DIRECT_IRQ_EN already, but doesn't clear the bit.
commit ff998356b644ebe723127bd9eec6040b59a4a4f6
Author: Eric Ernst <[email protected]>
Date: Thu Jun 12 11:06:20 2014 -0700
pinctrl: baytrail: Warn if direct IRQ GPIO set to output
Maybe adding a patch clearing the bit on top of that patch?
And send that patch to Linus Walleij as well (added to cc)
Thanks
-Mathias
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