Lars

On 09/30/2014 04:29 PM, Lars-Peter Clausen wrote:
> On 09/30/2014 11:18 PM, Dan Murphy wrote:
>> Lars
>>
>> On 09/30/2014 04:03 PM, Lars-Peter Clausen wrote:
>>> On 09/30/2014 06:07 PM, Dan Murphy wrote:
>>>> There may be spi devices that do not require a
>>>> register read mask to read the registers.
>>>>
>>>> Currently the code sets the read mask based on
>>>> a non-zero value passed in from the driver or if that
>>>> value is 0 sets the read mask to 0x80.
>>>
>>> It only sets it to the bus default if both read_flag_mask and 
>>> write_flag_mask are 0. The assumption is that both of them being zero is a 
>>> invalid configuration and either of them (or both) have to be non-zero for 
>>> proper operation, since otherwise the device can't tell the difference 
>>> between a read and a write.
>>>
>>> Do you have a device where both the read and the write mask is 0?
>>>
>>> - Lars
>>
>> Yes I do have a device that the read/write mask are both 0.
>>
>> The device, which is already in production, has a specific control register 
>> that sets either the reading or writing of the rest of the registers.
>>
>> Here is the data sheet
>>
>> http://www.ti.com/lit/ds/symlink/afe4403.pdf
>>
>> See page 61 control0.
>>
>> Driver is written for this part just want to get this lead patch in or maybe 
>> an alternate solution.
>
> Looking at this the generic SPI regmap implementation might not necessarily 
> be the best thing to use here and you are probably better of implementing 
> either your own regmap bus or reg_read/reg_write callbacks that automatically 
> set/clear the SPI_READ bit in the control register depending on the operation.
>
> - Lars

I am not sure implementing a different SPI regmap implementation is really the 
best thing.
I am handling this control bit toggling in the peripheral driver.
The device only needs to be written at init and then during calibration.  Other 
then that it is read read read.

Dan

-- 
------------------
Dan Murphy

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