On Wednesday, October 01, 2014 at 04:28:17 PM, bpqw wrote: > This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes. > > For Micron SPI NOR flash, enabling or disabling quad I/O protocol is > controlled by EVCR (Enhanced Volatile Configuration Register), Quad I/O > protocol bit 7. When EVCR bit 7 is reset to 0, the SPI NOR flash will > operate in quad I/O mode. > > Signed-off-by: bean huo <bean...@micron.com>
I don't see anything obviously wrong. Acked-by: Marek Vasut <ma...@denx.de> Best regards, Marek Vasut -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
