On 21 October 2014 11:22, Sebastian Hesselbarth <[email protected]> wrote: > commit bb8175a8aa42d731a840cd474e348ac3367eb5a0 > ("mmc: sdhci: clarify DDR timing mode between SD-UHS and eMMC") > added MMC_DDR52 as eMMC's DDR mode to be distinguished from SD-UHS. > > While the differentation may be useful, pxav3 SDHCI controller lacks > a corresponding check in its custom .set_uhs_signaling callback for > MMC_DDR52. This patch adds a new switch case for MMC_TIMING_MMC_DDR52 > to MMC_TIMING_UHS_DDR50 case. > > Signed-off-by: Sebastian Hesselbarth <[email protected]>
Thanks! Applied for next! Kind regards Uffe > --- > Cc: Chris Ball <[email protected]> > Cc: Ulf Hansson <[email protected]> > Cc: "Antoine Ténart" <[email protected]> > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > --- > drivers/mmc/host/sdhci-pxav3.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c > index 5036d7d39529..b55c807982fe 100644 > --- a/drivers/mmc/host/sdhci-pxav3.c > +++ b/drivers/mmc/host/sdhci-pxav3.c > @@ -211,6 +211,7 @@ static void pxav3_set_uhs_signaling(struct sdhci_host > *host, unsigned int uhs) > case MMC_TIMING_UHS_SDR104: > ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180; > break; > + case MMC_TIMING_MMC_DDR52: > case MMC_TIMING_UHS_DDR50: > ctrl_2 |= SDHCI_CTRL_UHS_DDR50 | SDHCI_CTRL_VDD_180; > break; > -- > 2.1.1 > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
