[PATCH 3.2 062/102] can: flexcan: correctly initialize mailboxes

[Ben Hutchings]

3.2.64-rc1 review patch.  If anyone has any objections, please let me know.

------------------

From: David Jander <da...@protonic.nl>

commit fc05b884a31dbf259cc73cc856e634ec3acbebb6 upstream.

Apparently mailboxes may contain random data at startup, causing some of them
being prepared for message reception. This causes overruns being missed or even
confusing the IRQ check for trasmitted messages, increasing the transmit
counter instead of the error counter.

This patch initializes all mailboxes after the FIFO as RX_INACTIVE.

Signed-off-by: David Jander <da...@protonic.nl>
Signed-off-by: Marc Kleine-Budde <m...@pengutronix.de>
Signed-off-by: Ben Hutchings <b...@decadent.org.uk>
---
 drivers/net/can/flexcan.c | 7 +++++++
 1 file changed, 7 insertions(+)

--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -679,6 +679,7 @@ static int flexcan_chip_start(struct net
        struct flexcan_regs __iomem *regs = priv->base;
        int err;
        u32 reg_mcr, reg_ctrl;
+       int i;
 
        /* enable module */
        flexcan_chip_enable(priv);
@@ -744,6 +745,12 @@ static int flexcan_chip_start(struct net
        dev_dbg(dev->dev.parent, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);
        flexcan_write(reg_ctrl, &regs->ctrl);
 
+       /* clear and invalidate all mailboxes first */
+       for (i = FLEXCAN_TX_BUF_ID; i < ARRAY_SIZE(regs->cantxfg); i++) {
+               flexcan_write(FLEXCAN_MB_CODE_RX_INACTIVE,
+                             &regs->cantxfg[i].can_ctrl);
+       }
+
        /* mark TX mailbox as INACTIVE */
        flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,
                      &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);

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