On Tue, Oct 14, 2014 at 02:09:21PM +0800, Addy Ke wrote: > As show in I2C specification: > - Standard-mode: the minimum HIGH period of the scl clock is 4.0us > the minimum LOW period of the scl clock is 4.7us > - Fast-mode: the minimum HIGH period of the scl clock is 0.6us > the minimum LOW period of the scl clock is 1.3us > > I have measured i2c SCL waveforms in fast-mode by oscilloscope > on rk3288-pinky board. the LOW period of the scl clock is 1.3us. > It is so critical that we must adjust LOW division to increase > the LOW period of the scl clock. > > Thanks Doug for the suggestion about division formulas. > > Tested-by: Heiko Stuebner <[email protected]> > Reviewed-by: Doug Anderson <[email protected]> > Tested-by: Doug Anderson <[email protected]> > Signed-off-by: Addy Ke <[email protected]>
Applied to for-next, thanks!
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