CPU1 "resettable" status is already cleared by final suspend function in case
of suspend abortion and by reset handler in case of completed CPU powergate,
no point to do it again.
Signed-off-by: Dmitry Osipenko <dig...@gmail.com>
---
arch/arm/mach-tegra/cpuidle-tegra20.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c
b/arch/arm/mach-tegra/cpuidle-tegra20.c
index b30bf5c..ad6158e 100644
--- a/arch/arm/mach-tegra/cpuidle-tegra20.c
+++ b/arch/arm/mach-tegra/cpuidle-tegra20.c
@@ -158,8 +158,6 @@ static bool tegra20_idle_enter_lp2_cpu_1(struct
cpuidle_device *dev,
cpu_suspend(0, tegra20_sleep_cpu_secondary_finish);
- tegra20_cpu_clear_resettable();
-
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
return true;
--
2.2.1
--
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