The chip and system controller nodes are now handled by the Berlin
controller mfd driver. Its sub-devices are then registered by the mfd
driver and let the drivers be probed properly, using their own
sub-nodes.
Rework the device tree to take this changes into account.
Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
---
arch/arm/boot/dts/berlin2cd.dtsi | 32 ++++++++++++++++++++++----------
1 file changed, 22 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index 230df3b1770e..314cde70a3ba 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -79,7 +79,7 @@
compatible = "marvell,berlin2cd-usb-phy";
reg = <0xb74000 0x128>;
#phy-cells = <0>;
- resets = <&chip 0x178 23>;
+ resets = <&chip_rst 0x178 23>;
status = "disabled";
};
@@ -87,7 +87,7 @@
compatible = "marvell,berlin2cd-usb-phy";
reg = <0xb78000 0x128>;
#phy-cells = <0>;
- resets = <&chip 0x178 24>;
+ resets = <&chip_rst 0x178 24>;
status = "disabled";
};
@@ -289,17 +289,25 @@
};
};
- chip: chip-control@ea0000 {
- compatible = "marvell,berlin2cd-chip-ctrl";
- #clock-cells = <1>;
- #reset-cells = <2>;
+ chip: chip-controller@ea0000 {
+ compatible = "marvell,berlin2cd-chip-ctrl", "syscon";
reg = <0xea0000 0x400>;
+ #clock-cells = <1>;
clocks = <&refclk>;
clock-names = "refclk";
- uart0_pmux: uart0-pmux {
- groups = "G6";
- function = "uart0";
+ soc_pinctrl: pin-controller {
+ compatible = "marvell,berlin2cd-soc-pinctrl";
+
+ uart0_pmux: uart0-pmux {
+ groups = "G6";
+ function = "uart0";
+ };
+ };
+
+ chip_rst: reset {
+ compatible = "marvell,berlin2-reset";
+ #reset-cells = <2>;
};
};
@@ -384,8 +392,12 @@
};
sysctrl: system-controller@d000 {
- compatible = "marvell,berlin2cd-system-ctrl";
+ compatible = "marvell,berlin2cd-system-ctrl",
"syscon";
reg = <0xd000 0x100>;
+
+ sys_pinctrl: pin-controller {
+ compatible =
"marvell,berlin2cd-system-pinctrl";
+ };
};
sic: interrupt-controller@e000 {
--
2.3.0
--
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