On Fri, Feb 27, 2015 at 5:06 AM, Will Deacon <will.dea...@arm.com> wrote: > On Fri, Feb 27, 2015 at 05:46:55AM +0000, Pranith Kumar wrote: >> In cmpxchg(), we do a load exclusive on an address and upon a comparison >> fail, >> we skip the store exclusive instruction. This can result in the exclusive bit >> still set. If there was a store exclusive after this to the same address, >> that >> will see the exclusive bit set. This should not happen. > > ... and the problem with that is?
Consider the following scenario: P0 P1 --------------------------------- ldxr x7, [B] // exclusive bit set add x7, x7, #1 str ..., [B] // exclusive bit cleared cmpxchg: ldxr x0, [B] // exclusive bit set cmp x0, #0 // cmp fails b.ne 1f // branch taken stxr x1, [B] // end of cmpxchg 1: stxr x7, [B] // succeeds? The last store exclusive succeeds since the exclusive bit is set which should not happen. Clearing the exclusive bit before returning from cmpxchg prevents this happening. Now I am not sure how likely this will happen. One can argue that a cmpxchg() will not happen between an external ldxr/stxr. But isn't clearing the exclusive bit better? -- Pranith -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/