The patch adds bindings for clocks required by async-bridges
present in the particular power domain.
Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.marti...@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.marti...@collabora.co.uk>
---
Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 1e09703..5da38c5 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -22,6 +22,9 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
+ - asbN: Clocks required by asynchronous bridges (ASB) present in
+ the power domain. These clock should be enabled during power
+ domain on/off operations.
- power-domains: phandle pointing to the parent power domain, for more details
see Documentation/devicetree/bindings/power/power_domain.txt
--
1.9.1
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