On Thu, Mar 26, 2015 at 04:00:57AM +0000, Elliott, Robert (Server Storage) wrote: > > -----Original Message----- > > From: [email protected] [mailto:linux-kernel- > > [email protected]] On Behalf Of Andy Lutomirski > > Sent: Wednesday, March 18, 2015 1:07 PM > > To: Boaz Harrosh > > Cc: Matthew Wilcox; Ross Zwisler; X86 ML; Thomas Gleixner; Dan Williams; > > Ingo Molnar; Roger C. Pao; linux-nvdimm; linux-kernel; H. Peter Anvin; > > Christoph Hellwig > > Subject: Re: [PATCH 1/8] pmem: Initial version of persistent memory driver > > > > On Mar 9, 2015 8:20 AM, "Boaz Harrosh" <[email protected]> wrote: > > > > > > On 03/06/2015 01:03 AM, Andy Lutomirski wrote: > > > <> > > > > > > > > I think it would be nice to have control over the caching mode. > > > > Depending on the application, WT or UC could make more sense. > > > > > > > > > > Patches are welcome. say > > > map=sss@aaa:WT,sss@aaa:CA, ... > > > > > > But for us, with direct_access(), all benchmarks show a slight advantage > > > for the cached mode. > > > > I'm sure cached is faster. The question is: who flushes the cache? > > > > --Andy > > Nobody.
There is another discussion going on about ensuring we have mechanisms to flush the cpu caches correctly when DAX is enabled and data integrity operations are run. i.e. fsync and sync will provide cache flush triggers for DAX enabled devices once we get everything in place. Cheers, Dave. -- Dave Chinner [email protected] -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
