Hi Arnd, Thanks for your comment!
2015-04-07 16:41 GMT+09:00 Arnd Bergmann <[email protected]>: > On Tuesday 07 April 2015 12:34:30 Masahiro Yamada wrote: >> >> What is the cause of the kernel panic? How to fix it? >> Any hint is very appreciated. >> > > Cortex-A9 usually need to set up the L2 Cache controller, and you > don't have a node for that. > > Can you try adding a DT node for it? You may also have to specify > the overrides for its aux control register in DT if that is not > set up right by the boot loader or the power-on defaults. I have not checked the L2 (outer) cache yet. The L2 cache on our SoC is not a famous IP, but our own implementation. I will have to implement L2 code as well as the device tree node. Is there any workaround to boot Linux without L2 cache? -- Best Regards Masahiro Yamada -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
