On Thursday 09 April 2015 12:37:11 Kumar Gala wrote:
> From: Abhimanyu Kapur <abhim...@codeaurora.org>
>
> Add qcom cpu operations for arm-v8 cpus. Implement secondary cpu boot ops
> As a part of this change update device tree documentation for:
>
> 1. Arm cortex-a ACC device which provides percpu reg
> 2. Armv8 cortex-a compatible string in arm/cpus.txt
>
> Signed-off-by: Abhimanyu Kapur <abhim...@codeaurora.org>
> Signed-off-by: Kumar Gala <ga...@codeaurora.org>
> ---
> Documentation/devicetree/bindings/arm/cpus.txt | 2 +
> Documentation/devicetree/bindings/arm/msm/acc.txt | 19 ++
> drivers/soc/qcom/Makefile | 1 +
> drivers/soc/qcom/cpu_ops.c | 343
> ++++++++++++++++++++++
> 4 files changed, 365 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/msm/acc.txt
>
I don't want this in drivers/soc. Please find a way to integrate it into the
arch/arm64 code.
Arnd
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