* Peter Zijlstra <pet...@infradead.org> wrote:
> On Thu, Apr 09, 2015 at 08:28:41AM +0200, Ingo Molnar wrote:
> > Btw., does cpu_base->active_bases even make sense? hrtimer bases are
> > fundamentally percpu, and to check whether there are any pending
> > timers is a very simple check:
> >
> > base->active->next != NULL
> >
>
> Yeah, that's 3 pointer dereferences from cpu_base, iow you traded a
> single bit test on an already loaded word for 3 potential cacheline
> misses.
But the clock bases are not aligned to cachelines, and we have 4 of
them. So in practice when we access one, we'll load the next one
anyway.
Furthermore the simplification is measurable, and a fair bit of it is
in various fast paths. I'd rather trade a bit of a cacheline footprint
for less overall complexity and faster code.
Thanks,
Ingo
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