On Monday, May 04, 2015 at 01:11:03 PM, Michal Suchanek wrote: > Hello, Hi!
> On 1 May 2015 at 16:20, Marek Vasut <ma...@denx.de> wrote: > > On Friday, May 01, 2015 at 09:05:15 AM, Michal Suchanek wrote: > >> On 1 May 2015 at 01:13, Marek Vasut <ma...@denx.de> wrote: > >> I can determine it for this particular chip. However, when the vendor > >> datasheet says the block is 64/32K it might mean that chips with this > >> ID can have either block size. > > > > http://www.chingistek.com/img/Product_Files/Pm25LD010020datasheet%20v04.p > > df page 21: > > > > SECTOR_ER (20h) erases 4kByte sector. > > BLOCK_ER (d8h) erases 64kByte sector. > > > > http://www.gigadevice.com/product/download/366.html?locale=en_US > > page 27-28: > > > > Sector Erase (SE) (20h) erases 4kByte sector > > 64KB Block Erase (BE) (d8h) erases 64kByte sector > > It's pretty much the same as the datasheet I used > http://www.elm-tech.com/en/products/spi-flash-memory/gd25q41/gd25q41.pdf > > It mentions both > 32KB Block Erase (BE) (52H) > and > 64KB Block Erase (BE) (D8H) The SPI NOR framework will use 0xbe opcode, no problem. > So the chip probably tries its best to be compatible with any command > set and this last patch is not needed. The memory organization table > on page 7 is not all that reassuring, though. Which exact part do you refer to please ? Best regards, Marek Vasut -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/