Add binding documentation for Ingenic SoC interrupt controllers.
Signed-off-by: Paul Burton <[email protected]>
Acked-by: Rob Herring <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Lars-Peter Clausen <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: [email protected]
---
Changes in v5:
- List all supported compatible strings in the binding document.
Changes in v4:
- s/intc/interrupt-controller/ in example.
Changes in v3:
- Merge documentation for various Ingenic SoCs, which only differ by
their compatible strings.
Changes in v2: None
.../bindings/interrupt-controller/ingenic,intc.txt | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
new file mode 100644
index 0000000..5f89fb6
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
@@ -0,0 +1,28 @@
+Ingenic SoC Interrupt Controller
+
+Required properties:
+
+- compatible : should be "ingenic,<socname>-intc". Valid strings are:
+ ingenic,jz4740-intc
+ ingenic,jz4770-intc
+ ingenic,jz4775-intc
+ ingenic,jz4780-intc
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The value shall be 1.
+- interrupt-parent : phandle of the CPU interrupt controller.
+- interrupts : Specifies the CPU interrupt the controller is connected to.
+
+Example:
+
+intc: interrupt-controller@10001000 {
+ compatible = "ingenic,jz4740-intc";
+ reg = <0x10001000 0x14>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+};
--
2.4.1
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