Allow the interrupt controllers of the JZ4770, JZ4775 & JZ4780 SoCs to
be probed via devicetree, supporting the 64 interrupts they provide.
Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Lars-Peter Clausen <l...@metafoo.de>
Cc: Thomas Gleixner <t...@linutronix.de>
Cc: Jason Cooper <ja...@lakedaemon.net>
Cc: Ralf Baechle <r...@linux-mips.org>
Cc: linux-m...@linux-mips.org
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Support JZ4775, and use a more generic "2chip" probe function name
for doing so whilst sharing code with the JZ4780.
Changes in v2: None
arch/mips/jz4740/irq.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c
index 5887f37..64b4c36 100644
--- a/arch/mips/jz4740/irq.c
+++ b/arch/mips/jz4740/irq.c
@@ -167,3 +167,12 @@ static int __init intc_1chip_of_init(struct device_node
*node,
return ingenic_intc_of_init(node, 1);
}
IRQCHIP_DECLARE(jz4740_intc, "ingenic,jz4740-intc", intc_1chip_of_init);
+
+static int __init intc_2chip_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ return ingenic_intc_of_init(node, 2);
+}
+IRQCHIP_DECLARE(jz4770_intc, "ingenic,jz4770-intc", intc_2chip_of_init);
+IRQCHIP_DECLARE(jz4775_intc, "ingenic,jz4775-intc", intc_2chip_of_init);
+IRQCHIP_DECLARE(jz4780_intc, "ingenic,jz4780-intc", intc_2chip_of_init);
--
2.4.1
--
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