Hello, For what it's worth, a reworked implementation of the OCOTP driver implementing the proper fuse and shadow register read sequence as mentioned in the TRM.
I will avoid unnecessary churn after this and send the next v7 once the nvmem framework gets merged. Used the OCOTP code in barebox as a reference and the code is highly similar to that. iMX6 OCOTP memory map is however different to Vybrid. This set also does not contain code for exposing the ROM information, have yet to check that. Feedback and comments are most welcome. Thank you for all the reviews till now. Regards, Sanchayan. Sanchayan Maity (3): clk: clk-vf610: Add clock for Vybrid OCOTP controller ARM: dts: vfxxx: Add OCOTP node drivers: nvmem: Add Vybrid OCOTP support arch/arm/boot/dts/vfxxx.dtsi | 7 + drivers/clk/imx/clk-vf610.c | 1 + drivers/nvmem/Kconfig | 10 ++ drivers/nvmem/Makefile | 2 + drivers/nvmem/vf610-ocotp.c | 250 ++++++++++++++++++++++++++++++++ include/dt-bindings/clock/vf610-clock.h | 3 +- 6 files changed, 272 insertions(+), 1 deletion(-) create mode 100644 drivers/nvmem/vf610-ocotp.c -- 2.4.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
