On Tue, Jul 14, 2015 at 12:24:20PM +0100, Peter Zijlstra wrote:
> On Tue, Jul 14, 2015 at 12:08:11PM +0100, Will Deacon wrote:
> > On Tue, Jul 14, 2015 at 11:58:37AM +0100, Peter Zijlstra wrote:
>
>
> > > #ifndef atomic_add_return_relaxed
> > >
> > > #define atomic_add_return_relaxed atomic_add_return
> > > /*
> > > * If one cannot define a more relaxed version,
> > > * acquire/release are out the window too.
> > > */
> > > #define atomic_add_return_acquire atomic_add_return
> > > #define atomic_add_return_release atomic_add_return
> > >
> > > #else /* relaxed */
> > >
> > > #ifndef atomic_add_return_acquire
> > > #define atomic_add_return_acquire(args...) \
> > > do { \
> > > atomic_add_return_relaxed(args); \
> > > smp_mb__after_atomic(); \
> > > } while (0)
> > > #endif
> > >
> > > #ifndef atomic_add_return_release
> > > #define atomic_add_return_release(args...) \
> > > do { \
> > > smp_mb__before_atomic(); \
> > > atomic_add_return_relaxed(args); \
> > > } while (0)
> > > #endif
>
> One could even take it one step further and go:
>
> #ifndef atomic_add_return
> #define atomic_add_return(args...) \
> do { \
> smp_mb__before_atomic(); \
> atomid_add_return_relaxed(args); \
> smp_mb__after_atomic(); \
> } while (0)
...and
#ifndef atomic_add
#define atomic_add(args...) (void)atomic_add_return_relaxed(args);
It would mean a new architecture only has to define a barrier instruction
and a handful of relaxed atomics for a bare-minimum atomic.h avoiding
spinlocks.
Will
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