Range breakpoints will do the wrong thing if the address isn't
aligned.  While we're there, add comments about why it's safe for
instruction breakpoints.

Signed-off-by: Andy Lutomirski <[email protected]>
---
 arch/x86/kernel/hw_breakpoint.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/x86/kernel/hw_breakpoint.c b/arch/x86/kernel/hw_breakpoint.c
index 78f3e90c5659..6f345d302cf6 100644
--- a/arch/x86/kernel/hw_breakpoint.c
+++ b/arch/x86/kernel/hw_breakpoint.c
@@ -291,8 +291,18 @@ static int arch_build_bp_info(struct perf_event *bp)
                break;
 #endif
        default:
+               /* AMD range breakpoint */
                if (!is_power_of_2(bp->attr.bp_len))
                        return -EINVAL;
+               if (bp->attr.bp_addr & (bp->attr.bp_len - 1))
+                       return -EINVAL;
+               /*
+                * It's impossible to use a range breakpoint to fake out
+                * user vs kernel detection because bp_len - 1 can't
+                * have the high bit set.  If we ever allow range instruction
+                * breakpoints, then we'll have to check for kprobe-blacklisted
+                * addresses anywhere in the range.
+                */
                if (!cpu_has_bpext)
                        return -EOPNOTSUPP;
                info->mask = bp->attr.bp_len - 1;
-- 
2.4.3

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