Hi Felipe, 

Any comments on the below [v4] patches?

[PATCH 1/3][v4] Documentation: dt: dwc3: Add snps,quirk-frame-length-adjustment 
property
[PATCH 2/3][v4] drivers: usb: dwc3: Add frame length adjustment quirk
[PATCH 3/3][v4] arm: dts: ls1021a: Add quirk for Erratum A009116

I will be taking forward these patches, as Nikhil has left freescale.

Thanks,
Rajesh Bhagat

-----Original Message-----
From: Nikhil Badola [mailto:nikhil.bad...@freescale.com] 
Sent: Friday, September 04, 2015 10:15 AM
To: linux-kernel@vger.kernel.org; devicet...@vger.kernel.org; 
linux-...@vger.kernel.org
Cc: ba...@ti.com; Badola Nikhil-B46172 <nikhil.bad...@freescale.com>
Subject: [PATCH 1/3][v4] Documentation: dt: dwc3: Add 
snps,quirk-frame-length-adjustment property

Add snps,quirk-frame-length-adjustment property which provides value for post 
silicon frame length adjustment

Signed-off-by: Nikhil Badola <nikhil.bad...@freescale.com>
---
Changes for v4: None

 Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt 
b/Documentation/devicetree/bindings/usb/dwc3.txt
index 0815eac..8c7d585 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -40,6 +40,9 @@ Optional properties:
  - snps,hird-threshold: HIRD threshold
  - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for
    UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3.
+ - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ
+       register for post-silicon frame length adjustment when the
+       fladj_30mhz_sdbnd signal is invalid or incorrect.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
--
2.1.0

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