Brian Norris <[email protected]> writes: > On Sat, Sep 26, 2015 at 10:19:07PM +0200, Robert Jarzmik wrote: >> Robert Jarzmik <[email protected]> writes: >> >> > After the conversion of pxa architecture to common clock framework, the >> > NAND clock can be disabled on driver exit. >> > >> > In this case, it happens that if the driver used the NAND and set the >> > DFI arbitration bit, the next access to a static memory controller area, >> > such as an ethernet card, will stall the system bus, and the core will >> > be stalled forever. >> > >> > This is especially true on pxa31x SoCs, where the NDCR was augmented >> > with a new bit to prevent this lockups by giving full ownership of the >> > DFI arbiter to the SMC, in change SCr#6. >> > >> > Fix this by clearing the DFI arbritration bit in driver exit. This >> > effectively prevents a lockup on zylonite when removing pxa3xx-nand >> > module, and using ethernet afterwards. >> > >> > Signed-off-by: Robert Jarzmik <[email protected]> >> Hi Brian, >> >> Are you happy with this patch, and if so could you queue it please ? > > It looks OK to me, but it doesn't apply to the latest l2-mtd.git. Am I > missing something? I didn't try too hard to work out the conflict > myself. OK, I'll rebase it on your tree and resend a "PATCH v2 REBASED" version today.
Cheers. -- Robert -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
