Hi Jiri, [auto build test WARNING on v4.3-rc4 -- if it's inappropriate base, please ignore]
config: x86_64-randconfig-x019-201540 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All warnings (new ones prefixed by >>):
In file included from drivers/misc/eeprom/at25.c:17:0:
drivers/misc/eeprom/at25.c: In function 'fm25_id_read':
>> drivers/misc/eeprom/at25.c:170:3: warning: format '%Zd' expects argument of
>> type 'signed size_t', but argument 4 has type 'int' [-Wformat=]
"read %Zd bytes of ID --> %d\n",
^
include/linux/device.h:1180:31: note: in definition of macro 'dev_dbg'
dev_printk(KERN_DEBUG, dev, format, ##arg); \
^
drivers/misc/eeprom/at25.c: In function 'fm25_sernum_read':
drivers/misc/eeprom/at25.c:200:3: warning: format '%Zd' expects argument of
type 'signed size_t', but argument 4 has type 'int' [-Wformat=]
"read %Zd bytes of serial number --> %d\n",
^
include/linux/device.h:1180:31: note: in definition of macro 'dev_dbg'
dev_printk(KERN_DEBUG, dev, format, ##arg); \
^
drivers/misc/eeprom/at25.c: In function 'at25_fw_to_chip':
drivers/misc/eeprom/at25.c:401:43: warning: passing argument 3 of
'device_property_read_string' from incompatible pointer type
[-Wincompatible-pointer-types]
device_property_read_string(dev, "name", &name);
^
In file included from drivers/misc/eeprom/at25.c:22:0:
include/linux/property.h:41:5: note: expected 'const char **' but argument
is of type 'char **'
int device_property_read_string(struct device *dev, const char *propname,
^
vim +170 drivers/misc/eeprom/at25.c
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
> 17 #include <linux/device.h>
18 #include <linux/sched.h>
19
20 #include <linux/spi/spi.h>
21 #include <linux/spi/eeprom.h>
22 #include <linux/property.h>
23 #include <linux/of.h>
24 #include <linux/of_device.h>
25
26 /*
27 * NOTE: this is an *EEPROM* driver. The vagaries of product naming
28 * mean that some AT25 products are EEPROMs, and others are FLASH.
29 * Handle FLASH chips with the drivers/mtd/devices/m25p80.c driver,
30 * not this one!
31 */
32
33 struct at25_data {
34 struct spi_device *spi;
35 struct memory_accessor mem;
36 struct mutex lock;
37 struct spi_eeprom chip;
38 struct bin_attribute bin;
39 unsigned addrlen;
40 int has_sernum;
41 };
42
43 #define AT25_WREN 0x06 /* latch the write enable */
44 #define AT25_WRDI 0x04 /* reset the write enable */
45 #define AT25_RDSR 0x05 /* read status register */
46 #define AT25_WRSR 0x01 /* write status register */
47 #define AT25_READ 0x03 /* read byte(s) */
48 #define AT25_WRITE 0x02 /* write byte(s)/sector */
49 #define FM25_SLEEP 0xb9 /* enter sleep mode */
50 #define FM25_RDID 0x9f /* read device ID */
51 #define FM25_RDSN 0xc3 /* read S/N */
52
53 #define AT25_SR_nRDY 0x01 /* nRDY = write-in-progress */
54 #define AT25_SR_WEN 0x02 /* write enable (latched) */
55 #define AT25_SR_BP0 0x04 /* BP for software writeprotect
*/
56 #define AT25_SR_BP1 0x08
57 #define AT25_SR_WPEN 0x80 /* writeprotect enable */
58
59 #define AT25_INSTR_BIT3 0x08 /* Additional address bit in
instr */
60
61 #define FM25_ID_LEN 9 /* ID lenght */
62 #define FM25_SN_LEN 8 /* serial number lenght */
63
64 #define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2
MBytes */
65
66 /* Specs often allow 5 msec for a page write, sometimes 20 msec;
67 * it's important to recover from write timeouts.
68 */
69 #define EE_TIMEOUT 25
70
71 #define IS_EEPROM 0
72 #define IS_FRAM 1
73
74
/*-------------------------------------------------------------------------*/
75
76 #define io_limit PAGE_SIZE /* bytes */
77
78 static ssize_t
79 at25_ee_read(
80 struct at25_data *at25,
81 char *buf,
82 unsigned offset,
83 size_t count
84 )
85 {
86 u8 command[EE_MAXADDRLEN + 1];
87 u8 *cp;
88 ssize_t status;
89 struct spi_transfer t[2];
90 struct spi_message m;
91 u8 instr;
92
93 if (unlikely(offset >= at25->bin.size))
94 return 0;
95 if ((offset + count) > at25->bin.size)
96 count = at25->bin.size - offset;
97 if (unlikely(!count))
98 return count;
99
100 cp = command;
101
102 instr = AT25_READ;
103 if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
104 if (offset >= (1U << (at25->addrlen * 8)))
105 instr |= AT25_INSTR_BIT3;
106 *cp++ = instr;
107
108 /* 8/16/24-bit address is written MSB first */
109 switch (at25->addrlen) {
110 default: /* case 3 */
111 *cp++ = offset >> 16;
112 case 2:
113 *cp++ = offset >> 8;
114 case 1:
115 case 0: /* can't happen: for better codegen */
116 *cp++ = offset >> 0;
117 }
118
119 spi_message_init(&m);
120 memset(t, 0, sizeof t);
121
122 t[0].tx_buf = command;
123 t[0].len = at25->addrlen + 1;
124 spi_message_add_tail(&t[0], &m);
125
126 t[1].rx_buf = buf;
127 t[1].len = count;
128 spi_message_add_tail(&t[1], &m);
129
130 mutex_lock(&at25->lock);
131
132 /* Read it all at once.
133 *
134 * REVISIT that's potentially a problem with large chips, if
135 * other devices on the bus need to be accessed regularly or
136 * this chip is clocked very slowly
137 */
138 status = spi_sync(at25->spi, &m);
139 dev_dbg(&at25->spi->dev,
140 "read %Zd bytes at %d --> %d\n",
141 count, offset, (int) status);
142
143 mutex_unlock(&at25->lock);
144 return status ? status : count;
145 }
146
147 static ssize_t
148 fm25_id_read(struct at25_data *at25, char *buf)
149 {
150 u8 command = FM25_RDID;
151 ssize_t status;
152 struct spi_transfer t[2];
153 struct spi_message m;
154
155 spi_message_init(&m);
156 memset(t, 0, sizeof t);
157
158 t[0].tx_buf = &command;
159 t[0].len = 1;
160 spi_message_add_tail(&t[0], &m);
161
162 t[1].rx_buf = buf;
163 t[1].len = FM25_ID_LEN;
164 spi_message_add_tail(&t[1], &m);
165
166 mutex_lock(&at25->lock);
167
168 status = spi_sync(at25->spi, &m);
169 dev_dbg(&at25->spi->dev,
> 170 "read %Zd bytes of ID --> %d\n",
171 FM25_ID_LEN, (int) status);
172
173 mutex_unlock(&at25->lock);
---
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