On Wed, Jul 24, 2024 at 08:23:27PM -0700, Palmer Dabbelt wrote: > On Wed, 24 Jul 2024 12:14:00 PDT (-0700), Charlie Jenkins wrote: > > Use alternatives to add support for xtheadvector vector save/restore > > routines. > > > > Signed-off-by: Charlie Jenkins <[email protected]> > > Reviewed-by: Conor Dooley <[email protected]> > > b4 isn't applying this, either on top of your last patch set or rc1 -- the > base commit in the header isn't a hash I have, so I'm not sure where it's > mean to apply to. > > Also... > > > --- > > arch/riscv/include/asm/csr.h | 6 + > > arch/riscv/include/asm/switch_to.h | 2 +- > > arch/riscv/include/asm/vector.h | 225 > > +++++++++++++++++++++++++-------- > > arch/riscv/kernel/cpufeature.c | 5 +- > > arch/riscv/kernel/kernel_mode_vector.c | 8 +- > > arch/riscv/kernel/process.c | 4 +- > > arch/riscv/kernel/signal.c | 6 +- > > arch/riscv/kernel/vector.c | 12 +- > > 8 files changed, 198 insertions(+), 70 deletions(-) > > [...] > > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > > index bf25215bad24..cb48092fdc5d 100644 > > --- a/arch/riscv/kernel/cpufeature.c > > +++ b/arch/riscv/kernel/cpufeature.c > > @@ -845,10 +845,7 @@ static int __init > > riscv_fill_hwcap_from_ext_list(unsigned long *isa2hwcap) > > riscv_isa_set_ext(ext, source_isa); > > } > > > > -<<<<<<< HEAD > > riscv_resolve_isa(source_isa, isainfo->isa, &this_hwcap, > > isa2hwcap); > > -======= > > ->>>>>>> 0f260ac829ca (riscv: Extend cpufeature.c to detect vendor > > extensions) > > riscv_fill_cpu_vendor_ext(cpu_node, cpu); > > > > of_node_put(cpu_node); > > This chunk isn't applying, and it's got a conflict marker in there. So I > think that means something's gone off the rails?
I really messed that up... Okay I sent a new version that is based off of your for-next that should work? - Charlie
