Hello Frederic,
On Sat, Feb 09, 2019 at 05:59:35PM +0200, Sakari Ailus wrote:
> Hi Frederic,
>
> Thanks for the patchset.
>
> Could you also cc the devicetree list, please?
>
> On Fri, Feb 01, 2019 at 07:21:27PM +0800, Frederic Chen wrote:
> > This patch adds the DT binding documentation for the shared memory
> > between DIP (Digital Image Processing) unit of the camera ISP system
> > and the co-processor in Mediatek SoCs.
> >
> > Signed-off-by: Frederic Chen <[email protected]>
> > ---
> > .../bindings/media/mediatek,dip_smem.txt | 29
> > ++++++++++++++++++++++
> > 1 file changed, 29 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/media/mediatek,dip_smem.txt
> >
> > diff --git a/Documentation/devicetree/bindings/media/mediatek,dip_smem.txt
> > b/Documentation/devicetree/bindings/media/mediatek,dip_smem.txt
> > new file mode 100644
> > index 0000000..5533721
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek,dip_smem.txt
> > @@ -0,0 +1,29 @@
> > +Mediatek ISP Shared Memory Device
> > +
> > +Mediatek ISP Shared Memory Device is used to manage shared memory
> > +among CPU, ISP IPs and coprocessor. It is associated with a reserved
> > +memory region (Please see Documentation\devicetree\bindings\
> > +reserved-memory\mediatek,reserve-memory-isp_smem.txt) and
>
> s/\\/\//g;
>
> > +and provide the context to allocate memory with dma addresses.
Does this represent a real device (as in IP core) in the SoC ? There
seems to be no driver associated with the compatible string defined
herein in this patch series, what is this node used for ?
> > +Required properties:
> > +- compatible: Should be "mediatek,isp_smem"
>
> s/Should/Shall/
>
> > +
> > +- iommus: should point to the respective IOMMU block with master port
>
> s/should/shall/
>
> > + as argument. Please set the ports which may be accessed
> > + through the common path. You can see
> > + Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> > + for the detail.
> > +
> > +- mediatek,larb: must contain the local arbiters in the current Socs.
>
> Perhaps "SoCs"?
>
> > + Please set the larb of camsys for Pass 1 and imgsys for DIP, or both
> > + if you are using all the camera function. You can see
> > + Documentation/devicetree/bindings/memory-controllers/
> > + mediatek,smi-larb.txt for the detail.
> > +
> > +Example:
> > + isp_smem: isp_smem {
> > + compatible = "mediatek,isp_smem";
> > + mediatek,larb = <&larb5>;
> > + iommus = <&iommu M4U_PORT_CAM_IMGI>;
> > + };
--
Regards,
Laurent Pinchart
