On Mon, 2009-10-05 at 10:29 +0200, Jean Delvare wrote:
> On Sun, 04 Oct 2009 21:54:37 -0400, Andy Walls wrote:
> > On Mon, 2009-10-05 at 01:23 +0300, Aleksandr V. Piskunov wrote:

> > > 
> > > So question is:
> > > 1) Is it ok to decrease udelay for this board?
> > 
> > Sure, I think.  It would actually run the ivtv I2C bus at the nominal
> > clock rate specified by the I2C specification.
> 
> FWIW, 100 kHz isn't the "nominal" I2C clock rate, but the maximum clock
> rate for normal I2C. It is perfectly valid to run I2C buses as lower
> clock frequencies. I don't even think there is a minimum for I2C (but
> there is a minimum of 10 kHz for SMBus.)

Ah, thanks.  I was too lazy to go read my copy of the spec.


> But of course different hardware implementations may not fully cover
> the standard I2C or SMBus frequency range, and it is possible that a TV
> adapter manufacturer designed its hardware to run the I2C bus at a
> fixed frequency and we have to use that frequency to make the adapter
> happy.

This is very plausible for a microcontroller implementation of an I2C
slave, which is the case here.


> > I never had any reason to change it, as I feared causing regressions in
> > many well tested boards.
> 
> This is a possibility, indeed. But for obvious performance reasons, I'd
> rather use 100 kHz as the default, and let boards override it with a
> lower frequency of their choice if needed. Obviously this provides an
> easy improvement path, where each board can be tested separately and
> I2C bus frequency bumped from 50 kHz to 100 kHz after some good testing.
> 
> Some boards might even support fast I2C, up to 400 kHz but limited to
> 250 kHz by the i2c-algo-bit implementation.

I can add a module option to ivtv for I2C clock rate.  It may take a few
days.

Regards,
Andy

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