Em Tue, 19 Sep 2017 17:24:45 +0200 Philipp Zabel <p.za...@pengutronix.de> escreveu:
> Hi Dave, > > On Tue, 2017-09-19 at 14:08 +0100, Dave Stevenson wrote: > > The existing fixed value of 16 worked for UYVY 720P60 over > > 2 lanes at 594MHz, or UYVY 1080P60 over 4 lanes. (RGB888 > > 1080P60 needs 6 lanes at 594MHz). > > It doesn't allow for lower resolutions to work as the FIFO > > underflows. > > > > Using a value of 300 works for all resolutions down to VGA60, > > and the increase in frame delay is <4usecs for 1080P60 UYVY > > (2.55usecs for RGB888). > > > > Signed-off-by: Dave Stevenson <dave.steven...@raspberrypi.org> > > Can we increase this to 320? This would also allow > 720p60 at 594 Mbps / 4 lanes, according to the xls. Hmm... if this is dependent on the resolution and frame rate, wouldn't it be better to dynamically adjust it accordingly? Regards, Maur Thanks, Mauro
