The cir interface is like on the H3 located at 0x01f02000 and is exactly
the same. This patch adds support for the ir interface on the A83T.

Signed-off-by: Philipp Rossak <embe...@gmail.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi 
b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 06e96db7c41a..ddc0d592107f 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -605,6 +605,16 @@
                        #reset-cells = <1>;
                };
 
+               cir: cir@01f02000 {
+                       compatible = "allwinner,sun5i-a13-ir";
+                       clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
+                       clock-names = "apb", "ir";
+                       resets = <&r_ccu RST_APB0_IR>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       reg = <0x01f02000 0x400>;
+                       status = "disabled";
+               };
+
                r_pio: pinctrl@1f02c00 {
                        compatible = "allwinner,sun8i-a83t-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
-- 
2.11.0

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