Document what these two register calls are doing.
Signed-off-by: Brad Love <b...@nextdimension.cc>
---
drivers/media/pci/cx23885/cx23885-core.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/media/pci/cx23885/cx23885-core.c
b/drivers/media/pci/cx23885/cx23885-core.c
index 1150160..ca19e0d 100644
--- a/drivers/media/pci/cx23885/cx23885-core.c
+++ b/drivers/media/pci/cx23885/cx23885-core.c
@@ -1465,8 +1465,15 @@ int cx23885_start_dma(struct cx23885_tsport *port,
reg = reg | 0xa;
cx_write(PAD_CTRL, reg);
- /* FIXME and these two registers should be documented. */
+ /* Sets MOE_CLK_DIS to disable MoE clock */
+ /* sets MCLK_DLY_SEL/BCLK_DLY_SEL to 1 buffer delay each */
cx_write(CLK_DELAY, cx_read(CLK_DELAY) | 0x80000011);
+
+ /* ALT_GPIO_ALT_SET: GPIO[0]
+ * IR_ALT_TX_SEL: GPIO[1]
+ * GPIO1_ALT_SEL: VIP_656_DATA[0]
+ * GPIO0_ALT_SEL: VIP_656_CLK
+ */
cx_write(ALT_PIN_OUT_SEL, 0x10100045);
}
--
2.7.4
