This patch adds the DT binding documentation for the sensor interface
module in Mediatek SoCs.
Signed-off-by: Louis Kuo <louis....@mediatek.com>
---
.../bindings/media/mediatek-seninf.txt | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.txt
diff --git a/Documentation/devicetree/bindings/media/mediatek-seninf.txt
b/Documentation/devicetree/bindings/media/mediatek-seninf.txt
new file mode 100644
index 000000000000..bf2eb801cb47
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-seninf.txt
@@ -0,0 +1,30 @@
+* Mediatek seninf MIPI-CSI2 host driver
+
+Seninf MIPI-CSI2 host driver is a HW camera interface controller. It support a
widely adopted,
+simple, high-speed protocol primarily intended for point-to-point image and
video
+transmission between cameras and host devices.
+
+Required properties:
+ - compatible: "mediatek,mt8183-seninf"
+ - reg: Must contain an entry for each entry in reg-names.
+ - reg-names: Must include the following entries:
+ "base_reg": seninf registers base
+ "rx_reg": Rx analog registers base
+ - interrupts: interrupt number to the cpu.
+ - clocks : clock name from clock manager
+ - clock-names: must be CLK_CAM_SENINF and CLK_TOP_MUX_SENINF.
+ It is the clocks of seninf
+
+Example:
+ seninf: seninf@1a040000 {
+ compatible = "mediatek,mt8183-seninf";
+ reg = <0 0x1a040000 0 0x8000>,
+ <0 0x11C80000 0 0x6000>;
+ reg-names = "base_reg", "rx_reg";
+ interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>;
+ clocks = <&camsys CLK_CAM_SENINF>,
+ <&topckgen CLK_TOP_MUX_SENINF>;
+ clock-names = "CLK_CAM_SENINF", "CLK_TOP_MUX_SENINF";
+ }
+
--
2.18.0
