On Tue, 31 Aug 2010, Michael Grzeschik wrote:

> Hi Robert and Guennadi
> 
> On Sun, Aug 29, 2010 at 09:17:00PM +0200, Robert Jarzmik wrote:
> > Guennadi Liakhovetski <g.liakhovet...@gmx.de> writes:
> > 
> > > Robert, I'll need your ack / tested by on this one too. It actually 
> > > changes behaviour, for example, it sets MT9M111_OUTFMT_FLIP_BAYER_ROW in 
> > > the OUTPUT_FORMAT_CTRL register for the V4L2_MBUS_FMT_SBGGR8_1X8 8 bit 
> > > Bayer format. Maybe other things too - please have a look.
> > 
> > For the YUV and RGB formats, tested and acked.
> > For the bayer, I don't use it. With row switch, that gives back:
> > byte offset: 0 1 2 3
> >              B G B G
> >              G R G R
> > 
> > Without the switch:
> > byte offset: 0 1 2 3
> >              G R G R
> >              B G B G
> > 
> > I would have expected the second version (ie. without the switch, ie. the
> > original version of mt9m111 driver) to be correct, but I might be wrong. 
> > Maybe
> > Michael can enlighten me here.
> Yes this seems odd, i normaly expect the first line to be BGBG.
> I will search for the cause and reply a little later, perhaps end of
> the week, since i am also short on time at this moment.

Ok, _if_ you have to redo this patch, maybe you could also merge

[PATCH 04/11] mt9m111: added new bit offset defines
[PATCH 08/11] mt9m111: added reg_mask function

into it, otherwise their purpose is unclear.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
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