On Mon, Jul 04, 2016 at 10:51:50PM +0200, Heiner Kallweit wrote: > Am 04.07.2016 um 22:13 schrieb Sean Young: > > On Wed, May 18, 2016 at 10:29:41PM +0200, Heiner Kallweit wrote: > >> This chip has a 32 byte HW FIFO only. Therefore the default fifo size > >> of 512 raw events is not needed and can be significantly decreased. > >> > >> Signed-off-by: Heiner Kallweit <hkallwe...@gmail.com> > > > > The 32 byte hardware queue is read from an interrupt handler and added > > to the kfifo. The kfifo is read by the decoders in a seperate kthread > > (in ir_raw_event_thread). If we have a long IR (e.g. nec which has > > 66 edges) and the kthread is not scheduled in time (e.g. high load), will > > we not end up with an overflow in the kfifo and unable to decode it? > > > The interrupt handler is triggered latest when 24 bytes have been read. > (at least that's how the chip gets configured at the moment) > This gives the decoder thread at least 8 bytes time to process the > kfifo. This should be sufficient even under high load.
No, it gives the interrupt handler at least 8 bytes time to read the hardware fifo (and add it to the kfifo). There are no guarantees about when the decoder kthread runs (which reads the kfifo). To put it another way, in the nuvoton interrupt handler, you call ir_raw_event_handle() which does a wake_up_process(). That puts the decoder process (it has a pid) in a runnable state and it will run at some future time. Sean -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
