On Sat, Nov 27, 2010 at 12:54:41PM +0100, Michał Mirosław wrote:
> 2010/11/27 Simon Horman <[email protected]>:
> > The 16-19th bits of CE_CLK_CTRL set the
> > MMC clock frequency.
> >
> > Cc: Yusuke Goda <[email protected]>
> > Cc: Magnus Damm <[email protected]>
> > Signed-off-by: Simon Horman <[email protected]>
> > ---
> > include/linux/mmc/sh_mmcif.h | 17 +++++++++--------
> > 1 files changed, 9 insertions(+), 8 deletions(-)
> >
> > diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
> > index 519a2cd..44fc534 100644
> > --- a/include/linux/mmc/sh_mmcif.h
> > +++ b/include/linux/mmc/sh_mmcif.h
> > @@ -77,6 +77,9 @@ struct sh_mmcif_plat_data {
> > #define CLK_ENABLE (1 << 24) /* 1: output mmc clock */
> > #define CLK_CLEAR ((1 << 19) | (1 << 18) | (1 << 17) | (1 <<
> > 16))
> > #define CLK_SUP_PCLK ((1 << 19) | (1 << 18) | (1 << 17) | (1 <<
> > 16))
> > +#define CLKDIV_4 (1<<16) /* mmc clock frequency.
> > + * n: bus clock/(2^(n+1)) */
> > +#define CLKDIV_256 (7<<16) /* mmc clock frequency. (see above)
> > */
> > #define SRSPTO_256 ((1 << 13) | (0 << 12)) /* resp timeout */
> > #define SRBSYTO_29 ((1 << 11) | (1 << 10) | \
> > (1 << 9) | (1 << 8)) /* resp busy timeout */
> [...]
>
> Maybe zero is a valid value here meaning CLKDIV = 2.
Hi Michał,
Yes, it is. I intended to provide defines only for values that are used.
But I can provide all the valid values (there are only 9) it that
makes thing clearer. Or perhaps change the comment to:
/* CLKDIV_n
* mmc clock frequency.
* n: bus clock/(2^(m+1))
* where 0 <= m <= 8 */
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