For writes, HWFC shall be switched off when transfer size <= 8
bytes and when MCLK rate is above 50 MHz. For 50MHz and below
it shall be switched off when transfer size < 8 bytes.

Signed-off-by: Ulf Hansson <[email protected]>
---
 drivers/mmc/host/mmci.c |   12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 877079e..cd0fbee 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -664,12 +664,14 @@ static void mmci_start_data(struct mmci_host *host, 
struct mmc_data *data)
                        datactrl |= MCI_ST_DPSM_SDIOEN;
 
                        /*
-                        * The ST Micro variant for SDIO transfer sizes
-                        * less then 8 bytes should have clock H/W flow
-                        * control disabled.
+                        * The ST Micro variant for SDIO small write transfers
+                        * needs to have clock H/W flow control disabled,
+                        * otherwise the transfer will not start. The threshold
+                        * depends on the rate of MCLK.
                         */
-                       if ((host->size < 8) &&
-                           (data->flags & MMC_DATA_WRITE))
+                       if (data->flags & MMC_DATA_WRITE &&
+                           (host->size < 8 ||
+                            (host->size <= 8 && host->mclk > 50000000)))
                                clk = host->clk_reg & ~variant->clkreg_enable;
                        else
                                clk = host->clk_reg | variant->clkreg_enable;
-- 
1.7.10

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