On Fri, Dec 14, 2012 at 4:38 PM, Pawel Moll <[email protected]> wrote:
> The Versatile Express IOFPGA as shipped on VECD 5.0 (bitfiles v108/208 > and v116/216) contains a modified version of the PL180 MMCI, with > PeriphID Configuration value changed to 0x2. > > This version adds an optional "hardware flow control" feature. When > enabled MMC card clock will be automatically disabled when FIFO is > about to over/underflow and re-enabled once the host retrieved some > data. This makes the controller immune to over/underrun errors caused > by big interrupt handling latencies. > > This patch adds relevant device variant in the driver. > > Signed-off-by: Pawel Moll <[email protected]> Code seems to do the right thing compared to what U300 and Ux500 does with its similar HW flow control. Reviewed-by: Linus Walleij <[email protected]> Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
