Device tree for iMX6SL doesn't have an existing cpu frequency table.
Signed-off-by: John Tobias <[email protected]>
---
arch/arm/boot/dts/imx6sl.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 28558f1..0a2c73c 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -38,6 +38,20 @@
device_type = "cpu";
reg = <0x0>;
next-level-cache = <&L2>;
+ operating-points = <
+ /* kHz uV */
+ 996000 1250000 /* for consumer grade only */
+ 792000 1150000
+ 396000 1050000
+ >;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clks IMX6SL_CLK_ARM>, <&clks
IMX6SL_CLK_PLL2_PFD2>, <&clks IMX6SL_CLK_STEP>,
+ <&clks IMX6SL_CLK_PLL1_SW>, <&clks
IMX6SL_CLK_PLL1_SYS>;
+ clock-names = "arm", "pll2_pfd2_396m", "step",
+ "pll1_sw", "pll1_sys";
+ arm-supply = <®_arm>;
+ pu-supply = <®_pu>;
+ soc-supply = <®_soc>;
};
};
--
1.8.3.2
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