These changes intend to distinguish two DDR timing modes related to eMMC & UHS.
Even though two modes are different actually, UHS_DDR50 is used as eMMC DDR
mode.
MMC_TIMING_MMC_DDR52 mode is added.
Changes in V3:
(6/7) Added MMC-DDR52 mode instead of replacing UHS-DDR50 in
dw_mmc-exynos
Changes in V2:
(2/7) Added MMC-DDR52 mode instead of replacing UHS-DDR50 in mmci
Seungwon Jeon (7):
mmc: clarify DDR timing mode between SD-UHS and eMMC
mmc: mmci: clarify DDR timing mode between SD-UHS and eMMC
mmc: omap: clarify DDR timing mode between SD-UHS and eMMC
mmc: sh_mmcif: clarify DDR timing mode between SD-UHS and eMMC
mmc: rtsx: clarify DDR timing mode between SD-UHS and eMMC
mmc: dw_mmc: clarify DDR timing mode between SD-UHS and eMMC
mmc: sdhci: clarify DDR timing mode between SD-UHS and eMMC
drivers/mmc/core/debugfs.c | 3 +++
drivers/mmc/core/mmc.c | 2 +-
drivers/mmc/host/dw_mmc-exynos.c | 5 ++---
drivers/mmc/host/dw_mmc.c | 2 +-
drivers/mmc/host/mmci.c | 6 ++++--
drivers/mmc/host/omap_hsmmc.c | 4 ++--
drivers/mmc/host/rtsx_pci_sdmmc.c | 2 ++
drivers/mmc/host/sdhci.c | 4 +++-
drivers/mmc/host/sh_mmcif.c | 9 +++++----
include/linux/mmc/host.h | 3 ++-
10 files changed, 25 insertions(+), 15 deletions(-)>
Thanks,
sw-j
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