On 7 January 2014 19:37, Franky Lin <[email protected]> wrote:
> For high clock frequency modes, ie. SDR104 and possibly SDR50, the data
> window on the CMD and DAT lines needs to be tuned. Once tuned to a
> sample clock rate, a re-tuning might required because of drifted signal
> on different lines. This re-tuning is needed and only necessary for
> commands using the DAT lines, ie. adtc type commands. This patch is an
> optimization by adding the condition of the requested command being adtc
> type in order to execute the re-tuning procedure.
>
> Signed-off-by: Franky Lin <[email protected]>
Hi Franky,
Sorry for the delay.
> ---
> drivers/mmc/host/sdhci.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index cc00bed..f301cd6 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1389,7 +1389,8 @@ static void sdhci_request(struct mmc_host *mmc, struct
> mmc_request *mrq)
> * tuning procedure before sending command.
> */
> if ((host->flags & SDHCI_NEEDS_RETUNING) &&
> - !(present_state & (SDHCI_DOING_WRITE |
> SDHCI_DOING_READ))) {
> + !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))
> &&
> + mmc_cmd_type(mrq->cmd) == MMC_CMD_ADTC) {
I don't have the in-depth knowledge about the sdhci; Still, to me it
seems like checking for MMC_CMD_ADTC, is that not just the same a
checking if there are a READ/WRITE?
Another note, we really should be working on moving the periodic
"re-tuning trigger" mechanism into the mmc core layer, so all host
driver's could benefit from this. Do you want to help out fixing this?
Kind regards
Ulf Hansson
> if (mmc->card) {
> /* eMMC uses cmd21 but sd and sdio use cmd19
> */
> tuning_opcode =
> --
> 1.7.9.5
>
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