On 11 August 2015 at 04:53, Yangbo Lu <[email protected]> wrote:
> For eSDHC(version < 2.3), the pre divider only could divide base clock
> by 2 at least. Add workaround for this to avoid unexpected issue.
>
> Signed-off-by: Yangbo Lu <[email protected]>
Thanks, applied for next!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-of-esdhc.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
> b/drivers/mmc/host/sdhci-of-esdhc.c
> index 797be75..653f335 100644
> --- a/drivers/mmc/host/sdhci-of-esdhc.c
> +++ b/drivers/mmc/host/sdhci-of-esdhc.c
> @@ -208,6 +208,12 @@ static void esdhc_of_set_clock(struct sdhci_host *host,
> unsigned int clock)
> if (clock == 0)
> return;
>
> + /* Workaround to start pre_div at 2 for VNN < VENDOR_V_23 */
> + temp = esdhc_readw(host, SDHCI_HOST_VERSION);
> + temp = (temp & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
> + if (temp < VENDOR_V_23)
> + pre_div = 2;
> +
> /* Workaround to reduce the clock frequency for p1010 esdhc */
> if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
> if (clock > 20000000)
> --
> 2.1.0.27.g96db324
>
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