On Wed, 8 Nov 2017, Christoph Hellwig wrote:
> On Wed, Nov 08, 2017 at 07:33:09AM -0500, Mikulas Patocka wrote: > > We could use the function clwb() (or arch-independent wrapper dax_flush()) > > - that uses the clflushopt instruction on Broadwell or clwb on Skylake - > > but it is very slow, write performance on Broadwell is only 350MB/s. > > > > So in practice I use the movnti instruction that bypasses cache. The > > write-combining buffer is flushed with sfence. > > And what do you do for an architecture with virtuall indexed caches? Persistent memory is not supported on such architectures - it is only supported on x86-64 and arm64. Mikulas _______________________________________________ Linux-nvdimm mailing list Linux-nvdimm@lists.01.org https://lists.01.org/mailman/listinfo/linux-nvdimm
