On Mon, Feb 12, 2018 at 1:28 PM, Dave Jiang <dave.ji...@intel.com> wrote:
> Re-enable deep flush so that users always have a way to be sure that a write
> does make it all the way out to the NVDIMM.
I think this changelog needs to be a bit more clear/precise. The PMEM
driver writes always make it "all the way to the NVDIMM", and it
relies on the ADR mechanism them through write buffers on power
failure. Deep flush is there to explicitly flush those write buffers
to protect against (rare) ADR failure. This change prevents a
regression in deep flush behavior so that applications can continue to
depend on fsync() as a mechanism to trigger deep flush in the
Can you incorporate that feedback and also copy lkml on the resend?
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